The present disclosure relates generally to integrated circuit (IC) design, and more particularly to an improved method for designing input/output (I/O) cells for use in semiconductor ICs.
A basic component of an integrated circuit (IC) is the input/output (I/O) cell. A semiconductor chip generally has a core region located at a center region on the chip and I/O cells are placed around the periphery of the core region.
Devices in different IC packages are connected to one another at various I/O pads. The I/O pads are the connection points to the I/O cell. Depending on the need of the design, the I/O cell can be an input only cell, output only cell, or a bi-directional cell. The I/O cell may sense the logic state of signals applied to the I/O pad or may generate a logic state signal to be sensed. To correctly and efficiently interface with other IC packages or electrical devices, an I/O cell may take many forms.
Other electrical circuits might generate signals, and these signals may interact with the I/O cell. The I/O cell may be required to buffer, latch, pull-up, pull-down, or otherwise condition the signals. Alternatively, an I/O cell may provide an electrical signal to be sensed by external electrical circuits or IC packages. The I/O cell may be required to increase the driving strength of an output signal, or may pull-up, pull-down, or otherwise condition the signal. Additionally, bi-directional I/O cells may be used both for sensing input signals and generating output signals.
The design of IC packages can be accomplished manually or with the aide of various automated design tools. The layout and design of the I/O cells can also be designed with similar tools. To simplify the process and reduce time and cost, designed I/O cells are stored in libraries for reuse. The designer may search the library for an I/O cell design that satisfies specified performance requirements.
Although some optimization is provided by the use of pre-designed I/O cells in the library, the library may only provide a limited number of I/O cell for design options. To satisfy broadening demands for making various I/O cells, additional design effort is required to create new designs or integrate existing I/O cell designs. Additionally, to accommodate the ever expanding performance requirements, library entries are growing rapidly in number and complexity, making the creation and maintenance an I/O library significantly more time consuming.
What is needed is an improved method and system for generating I/O cells to reduce the design cycle time.